Devices in a communications system, such as a computer network, can receive large amounts of data. It is common for a receiving device in a communication system to not have visibility with respect to how much information is to be received from one or more transmitting devices. For example, in an Ethernet network a receiving device may not have visibility at the Physical and Data Link layer as to how large a packet being received will be, let alone how large a next packet will be, thereby leading to a possibility of data overflow and loss of transmitted data at the receiving device. Requiring immediate processing of the received data by a data processing resource to alleviate the possibility of an overflow would typically place an undesirable burden on the central processing unit (CPU) or other processing module of the device. Similarly, requiring a memory FIFO at the Data Link layer to be sufficiently large to guarantee not losing transmitted data before it can be offloaded to an application can be costly, when possible. Therefore, a small memory FIFO can be used to quickly store a small amount of received data temporarily prior to sending the received data to a data buffer.
In some situations, however, it is possible that data can be received more rapidly than applications can remove and process the data from the data buffer. This can lead to overflow of the data buffer and an undesirable loss of received data. While the likelihood of data buffer overflow can be reduced by using a large receive queue or data buffer, the size and cost of such memory is undesirable for many communication systems. Accordingly, an improved device for controlling data communication flow would be advantageous.